A semiconductor device is manufactured in such a manner that a silicon wafer is fabricated, then the chip is packaged by using epoxy or the like, in order to use the device as an electronic component. In accordance with the miniaturizing trend of electronic apparatuses, the density of semiconductor chips has increased in printed circuit boards. Thus, the package itself is gradually miniaturized, and such miniaturizing efforts are being continuously made.
As illustrated in FIG. 1, the usual semiconductor package is formed in the following manner. That is, semiconductor chip 3 is attached on lead frame paddle 1 using epoxy 2. Bonding pad 4 which is formed on the top of the chip is connected to inner lead 6 by means of metal wire 5, thereby forming an electrical connection. Epoxy molding compound 8 is molded to form a package, and outer leads 7 which project outward are bent to a proper form.
In accordance with the recent compactizing trend of the packages, paddle 1 of the lead frame is removed. Instead, the chip is secured to inner lead 4 of the lead frame by means of insulating tape 9, and semiconductor packages formed in such manner are generally used. Among them, there are a COL (chip on lead) structure in which chip 3 and insulating tape 9 are mounted as illustrated in FIG. 2, and an LOC (lead on chip) structure in which lead 4 is mounted on chip 3 as illustrated in FIG. 3.
The conventional semiconductor packaging process using the lead frame includes: a Die bonding step for attaching the chip to the lead frame; a wire bonding step for connecting the pad of the chip to the lead; and a trim-forming step for bending the outer leads. Thus, the process time is extended, and the bulk of the package is increased. Further, due to the difference between the thermal expansion coefficients of the materials (such as epoxy adhesive, the lead frame and the epoxy molding compound) which constitute the package, defects such as cracks, voids and the like are liable to occur.